Datasheet

PIC16F62X
DS40300C-page 18 Preliminary 2003 Microchip Technology Inc.
TABLE 3-4: SPECIAL FUNCTION REGISTERS SUMMARY BANK 3
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR
Reset
(1)
Details on
Page
Bank 3
180h INDF Addressing this location uses contents of FSR to address data memory (not a physical reg-
ister)
xxxx xxxx 25
181h OPTION RBPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 20
182h PCL Program Counter's (PC) Least Significant Byte 0000 0000 25
183h STATUS IRP RP1 RP0 TO
PD ZDCC 0001 1xxx 19
184h FSR Indirect data memory address pointer xxxx xxxx 25
185h Unimplemented
186h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 34
187h Unimplemented
188h Unimplemented
189h Unimplemented
18Ah PCLATH
Write buffer for upper 5 bits of program counter ---0 0000 25
18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 21
18Ch Unimplemented
18Dh Unimplemented
18Eh Unimplemented
18Fh Unimplemented
190h Unimplemented
191h Unimplemented
192h Unimplemented
193h Unimplemented
194h Unimplemented
195h Unimplemented
196h Unimplemented
197h Unimplemented
198h Unimplemented
199h Unimplemented
19Ah Unimplemented
19Bh Unimplemented
19Ch Unimplemented
19Dh Unimplemented
19Eh Unimplemented
19Fh Unimplemented
Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unim-
plemented
Note 1: For the Initialization Condition for Registers Tables, refer to Table 14-7 and Table 14-8 on page 98.