Datasheet

PIC16F62X
DS40300C-page 98 Preliminary  2003 Microchip Technology Inc.
TABLE 14-7: INITIALIZATION CONDITION FOR SPECIAL REGISTERS
TABLE 14-8: INITIALIZATION CONDITION FOR REGISTERS
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset 000h 0001 1xxx ---- 1-0x
MCLR
Reset during normal operation 000h 000u uuuu ---- 1-uu
MCLR
Reset during SLEEP 000h 0001 0uuu ---- 1-uu
WDT Reset 000h 0000 uuuu ---- 1-uu
WDT Wake-up PC + 1 uuu0 0uuu ---- u-uu
Brown-out Detect Reset 000h 000x xuuu ---- 1-u0
Interrupt Wake-up from SLEEP PC + 1
(1)
uuu1 0uuu ---- u-uu
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the interrupt vector
(0004h) after execution of PC+1.
Register Address
Power-on
Reset
• MCLR
Reset during normal
operation
• MCLR
Reset during SLEEP
• WDT Reset
• Brown-out Detect Reset
(1)
• Wake-up from SLEEP through
interrupt
• Wake-up from SLEEP through
WDT timeout
W—xxxx xxxx uuuu uuuu uuuu uuuu
INDF 00h —— —
TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu
PCL 02h 0000 0000 0000 0000 PC + 1
(3)
STATUS 03h 0001 1xxx 000q quuu
(4)
uuuq quuu
(4)
FSR 04h xxxx xxxx uuuu uuuu uuuu uuuu
PORTA 05h xxxx 0000 xxxx u000 xxxx 0000
PORTB 06h xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 10h --00 0000 --uu uuuu --uu uuuu
T2CON 12h -000 0000 -000 0000 -uuu uuuu
CCP1CON 17h --00 0000 --00 0000 --uu uuuu
RCSTA 18h 0000 -00x 0000 -00x uuuu -uuu
CMCON 1Fh 0000 0000 0000 0000 uu-- uuuu
PCLATH 0Ah ---0 0000 ---0 0000 ---u uuuu
INTCON 0Bh 0000 000x 0000 000u uuuu uqqq
(2)
PIR1 0Ch 0000 -000 0000 -000 -q-- ----
(2,5)
OPTION 81h 1111 1111 1111 1111 uuuu uuuu
TRISA 85h 11-1 1111 11-- 1111 uu-u uuuu
TRISB 86h 1111 1111 1111 1111 uuuu uuuu
PIE1 8Ch 0000 -000 0000 -000 uuuu -uuu
PCON 8Eh ---- 1-0x ---- 1-uq
(1,6)
---- --uu
TXSTA 98h 0000 -010 0000 -010 uuuu -uuu
EECON1 9Ch ---- x000 ---- q000 ---- uuuu
VRCON 9Fh 000- 0000 000- 0000 uuu- uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If V
DD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 14-7 for RESET value for specific condition.
5: If wake-up was due to comparator input changing, then Bit 6 = 1. All other interrupts generating a wake-up will cause Bit 6 = u.
6: If RESET was due to brown-out, then Bit 0 = 0. All other RESETS will cause Bit 0 = u.