Information

PIC16F62X
DS80073H-page 4  2000-2012 Microchip Technology Inc.
FIGURE 5-11: BLOCK DIAGRAM OF RB3/CCP1 PIN
VDD
Data Latch
TRIS Latch
RD TRISB
P
Vss
Q
D
Q
CK
Q
D
Q
CK
EN
QD
EN
N
VDD
0
1
RD PORTB
WR PORTB
WR TRISB
Schmitt
Trigger
Data Bus
Port/Peripheral
Select
(1)
PWM/Compare Output
RD PORTB
RB3/CCP1
CCP Input
RBPU
VDD
Weak Pull-up
P
TTL
Input
Buffer
pin
VSS
Note 1: Peripheral select is defined by CCP1M3:CCP1M0 (CCP1CON<3:0>).