Datasheet
PIC16F610/616/16HV610/616
DS41288F-page 40 © 2009 Microchip Technology Inc.
4.2.4.6 RA5/T1CKI/OSC1/CLKIN
Figure 4-5 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-5: BLOCK DIAGRAM OF RA5
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUA
RD
WPUA
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
WR
IOCA
RD
IOCA
To Timer1
INTOSC
Mode
RD PORTA
INTOSC
Mode
RAPU
OSC2
Note 1: Timer1 LP Oscillator enabled.
2: Set has priority over Reset.
TMR1LPEN
(1)
Oscillator
Circuit
Q1
I/O Pin
Interrupt-on-
Change
S
(2)
R
Q
From other
RA<4:0> pins
Write ‘0’ to RAIF