Datasheet

PIC16F610/616/16HV610/616
DS41288F-page 160 © 2009 Microchip Technology Inc.
FIGURE 15-8: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
FIGURE 15-9: BROWN-OUT RESET TIMING AND CHARACTERISTICS
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Start-Up Time
Internal Reset
(1)
Watchdog Timer
33
32
30
31
34
I/O pins
34
Note 1: Asserted low.
Reset
(1)
VBOR
VDD
(Device in Brown-out Reset) (Device not in Brown-out Reset)
33*
37
* 64 ms delay only if PWRTE bit in the Configuration Word register is programmed to ‘0’.
Reset
(due to BOR)
V
BOR + VHYST