Datasheet

© 2009 Microchip Technology Inc. DS41288F-page 153
PIC16F610/616/16HV610/616
15.8 DC Characteristics: PIC16F610/616/16HV610/616- I (Industrial)
PIC16F610/616/16HV610/616 - E (Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ T
A ≤ +125°C for extended
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
V
IL Input Low Voltage
I/O port:
D030 with TTL buffer Vss — 0.8 V 4.5V ≤ V
DD ≤ 5.5V
D030A Vss — 0.15 V
DD V2.0V ≤ VDD ≤ 4.5V
D031 with Schmitt Trigger buffer Vss — 0.2 V
DD V2.0V ≤ VDD ≤ 5.5V
D032 MCLR
, OSC1 (RC mode) VSS — 0.2 VDD V
D033 OSC1 (XT and LP modes) V
SS —0.3V
D033A OSC1 (HS mode) V
SS — 0.3 VDD V
V
IH Input High Voltage
I/O ports: —
D040 with TTL buffer 2.0 — V
DD V4.5V ≤ VDD ≤ 5.5V
D040A 0.25 V
DD + 0.8 — VDD V2.0V ≤ VDD ≤ 4.5V
D041 with Schmitt Trigger buffer 0.8 V
DD —VDD V2.0V ≤ VDD ≤ 5.5V
D042 MCLR
0.8 VDD —VDD V
D043 OSC1 (XT and LP modes) 1.6 — V
DD V
D043A OSC1 (HS mode) 0.7 V
DD —VDD V
D043B OSC1 (RC mode) 0.9 V
DD —VDD V (Note 1)
I
IL Input Leakage Current
(2,3)
D060 I/O ports — ± 0.1 ± 1 μAVSS ≤ VPIN ≤ VDD,
Pin at high-impedance
D061 RA3/MCLR
(3,4)
— ± 0.7 ± 5 μAVSS ≤ VPIN ≤ VDD
D063 OSC1 — ± 0.1 ± 5 μAVSS ≤ VPIN ≤ VDD, XT, HS and
LP oscillator configuration
D070* I
PUR PORTA Weak Pull-up Current
(5)
50 250 400 μAVDD = 5.0V, VPIN = VSS
VOL Output Low Voltage ——0.6VIOL = 7.0 mA, VDD = 4.5V,
-40°C to +125°C
D080 I/O ports — — 0.6 V I
OL = 8.5 mA, VDD = 4.5V,
-40°C to +85°C
V
OH Output High Voltage VDD – 0.7 — — V IOH = -2.5 mA, VDD = 4.5V,
-40°C to +125°C
D090 I/O ports
(2)
VDD – 0.7 — — V IOH = -3.0 mA, VDD = 4.5V,
-40°C to +85°C
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended to use an external
clock in RC mode.
2: Negative current is defined as current sourced by the pin.
3: The leakage current on the MCLR
pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
4: This specification applies to RA3/MCLR
configured as RA3 input with internal pull-up disabled.
5: This specification applies to all weak pull-up pins, including the weak pull-up on RA3/MCLR
. When RA3/MCLR is
configured as MCLR
reset pin, the weak pull-up is always enabled.