Datasheet

© 2009 Microchip Technology Inc. DS41288F-page 117
PIC16F610/616/16HV610/616
TABLE 12-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS
OSCTUNE 90h ---0 0000 ---u uuuu ---u uuuu
ANSEL
(7)
91h 1111 1111 1111 1111 uuuu uuuu
PR2
(6)
92h 1111 1111 1111 1111 1111 1111
WPUA 95h --11 -111 --11 -111 --uu -uuu
IOCA 96h --00 0000 --00 0000 --uu uuuu
SRCON0 99h 0000 00-0 0000 00-0 uuuu uu-u
SRCON1 9Ah 00-- ---- 00-- ---- uu-- ----
ADRESL
(6)
9Eh xxxx xxxx uuuu uuuu uuuu uuuu
ADCON1
(6)
9Fh -000 ---- -000 ---- -uuu ----
Condition
Program
Counter
Status
Register
PCON
Register
Power-on Reset 000h 0001 1xxx ---- --0x
MCLR Reset during normal operation 000h 000u uuuu
---- --uu
MCLR
Reset during Sleep 000h 0001 0uuu
---- --uu
WDT Reset 000h 0000 uuuu ---- --uu
WDT Wake-up PC + 1 uuu0 0uuu ---- --uu
Brown-out Reset 000h 0001 1uuu ---- --10
Interrupt Wake-up from Sleep PC + 1
(1)
uuu1 0uuu ---- --uu
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
TABLE 12-4: INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)
Register Address
Power-on
Reset
MCLR
Reset
WDT Reset (Continued)
Brown-out Reset
(1)
Wake-up from Sleep through
Interrupt
Wake-up from Sleep through
WDT Time-out (Continued)
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If V
DD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 12-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: PIC16F616/16HV616 only.
7: ANSEL <3:2> For PIC16F616/HV616 only.