Datasheet

PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616
DS41396A-page 2  2009 Microchip Technology Inc.
FIGURE 2-1: 8-PIN, 14-PIN, AND 16-PIN PROGRAMMING PINS DIAGRAM FOR PIC12F609/
12F615/12F617/16F610/16F616
(1)
TABLE 2-1: PIN DESCRIPTIONS IN PROGRAM/VERIFY MODE: PIC12F609/12F615/12F617/
16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616
Pin Name
During Programming
Function Pin Type Pin Description
GP1/RA1 ICSPCLK I Clock input – Schmitt Trigger input
GP0/RA0 ICSPDAT I/O Data input/output – Schmitt Trigger input
MCLR
Program/Verify mode P
(1)
Program Mode Select
V
DD VDD P Power Supply
V
SS VSS PGround
Legend: I = Input, O = Output, P = Power
Note 1: In the PIC12F609/12F615/12F617/16F610/16F616 and PIC12HV609/12HV615/16HV610/16HV616, the
programming high voltage is internally generated. To activate the Program/Verify mode, voltage of V
IHH
and a current of I
IHH (see Table 7-1) needs to be applied to MCLR input.
8-Pin PDIP, SOIC, MSOP, DFN
PIC12F615/609 PIC12F617
VSS
VDD
GP5
GP4
GP3/MCLR
/VPP
GP0/ICSPDAT
GP1/ICSPCLK
GP2
1
2
3
4
5
6
7
8
14-Pin PDIP, SOIC, TSSOP
PIC16F616/610
VSS
VDD
RA5
RA4
RA3/MCLR
/VPP
RA0/ICSPDAT
RA1/ICSPCLK
RA2
1
2
3
411
12
13
14
5
6
7
RC5
RC4
RC3
RC0
RC1
RC2
10
9
8
1
2
3
4
9
10
11
12
5 6 7 8
16 15 14 13
PIC16F616/HV616
RA5
RA4
RA3/MCLR
/VPP
RC5
VDD NC NC V
SS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC4 RC3 RC2 RC1
16-Pin QFN
PIC16F610/HV610
Note 1: Please see specific data sheets for alternate pin functionality.