Datasheet

© 2007 Microchip Technology Inc. DS41213D-page 51
PIC16F5X
SUBWF Subtract W from f
Syntax: [ label ] SUBWF f, d
Operands: 0 ≤ f ≤ 31
d ∈ [0,1]
Operation: (f) – (W) → (dest)
Status Affected: C, DC, Z
Encoding: 0000 10df ffff
Description: Subtract (2’s complement method)
the W register from register ‘f’. If ‘d’
is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Words: 1
Cycles: 1
Example 1
: SUBWF REG1, 1
Before Instruction
REG1 = 3
W=2
C=?
After Instruction
REG1 = 1
W=2
C = 1 ; result is positive
Example 2
:
Before Instruction
REG1 = 2
W=2
C=?
After Instruction
REG1 = 0
W=2
C = 1 ; result is zero
Example 3
:
Before Instruction
REG1 = 1
W=2
C=?
After Instruction
REG1 = 0xFF
W=2
C = 0 ; result is negative
SWAPF Swap Nibbles in f
Syntax: [ label ] SWAPF f, d
Operands: 0 ≤ f ≤ 31
d ∈ [0,1]
Operation: (f<3:0>) → (dest<7:4>);
(f<7:4>) → (dest<3:0>)
Status Affected: None
Encoding: 0011 10df ffff
Description: The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
‘0’, the result is placed in W
register. If ‘d’ is ‘1’, the result is
placed in register ‘f’.
Words: 1
Cycles: 1
Example
: SWAPF REG1, 0
Before Instruction
REG1 = 0xA5
After Instruction
REG1 = 0xA5
W = 0x5A
TRIS Load TRIS Register
Syntax: [ label ] TRIS f
Operands: f = 5, 6, 7, 8 or 9
Operation: (W) → TRIS register f
Status Affected: None
Encoding: 0000 0000 0fff
Description: TRIS register ‘f’ (f = 5, 6 or 7) is
loaded with the contents of the W
register.
Words: 1
Cycles: 1
Example
: TRIS PORTB
Before Instruction
W=0xA5
After Instruction
TRISB = 0xA5