Datasheet

PIC16F5X
DS41213D-page 26 © 2007 Microchip Technology Inc.
FIGURE 5-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD)
FIGURE 5-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE TIME
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): SLOW VDD RISE TIME
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
V1
Note : When VDD rises slowly, the TDRT time-out expires long before VDD has reached its final value. In this example, the
chip will reset properly if, and only if, V1 ≥ V
DD min.
TDRT