Datasheet

 2012 Microchip Technology Inc. Preliminary DS41652A-page 67
PIC16F527
REGISTER 10-2: CM2CON0: COMPARATOR C2 CONTROL REGISTER
TABLE 10-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
R-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
C2OUT C2OUTEN
C2POL C2PREF2 C2ON C2NREF C2PREF1 C2WU
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 C2OUT: Comparator Output bit
1 = V
IN+ > VIN-
0 = V
IN+ < VIN-
bit 6 C2OUTEN
: Comparator Output Enable bit
(1), (2)
1 = Output of comparator is NOT placed on the C2OUT pin
0 = Output of comparator is placed in the C2OUT pin
bit 5 C2POL: Comparator Output Polarity bit
(2)
1 = Output of comparator not inverted
0 = Output of comparator inverted
bit 4 C2PREF2: Comparator Positive Reference Select bit
(2)
1 = C1IN+ pin
0 = C2IN- pin
bit 3 C2ON: Comparator Enable bit
1 = Comparator is on
0 = Comparator is off
bit 2 C2NREF: Comparator Negative Reference Select bit
(2)
1 = C2IN- pin
0 = CV
REF
bit 1 C2PREF1: Comparator Positive Reference Select bit
(2)
1 = C2IN+ pin
0 = C2PREF2 controls analog input selection
bit 0 C2WU
: Comparator Wake-up on Change Enable bit
(2)
1 = Wake-up on Comparator change is disabled
0 = Wake-up on Comparator change is enabled.
Note 1: Overrides TRIS control of RC4.
2: When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have
precedence.
3: The C2WU
bit must be set to enable the CWIF function. See the INTCON0 register (Register 8-2) for more
information.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on page
STATUS
— —
PA0 TO PD ZDCC19
CM1CON0 C1OUT C1OUTEN
C1POL C1T0CS C1ON C1NREF C1PREF C1WU 66
CM2CON0 C2OUT C2OUTEN
C2POL C2PREF2 C2ON C2NREF C2PREF1 C2WU 67
TRIS
I/O Control Register (TRISA, TRISB, TRISC) —
Legend: x = Unknown, u = Unchanged, – = Unimplemented, read as ‘0’, q = Depends on condition.