Datasheet

 2012 Microchip Technology Inc. Preliminary DS41652A-page 61
PIC16F527
9.1.6 ANALOG CONVERSION RESULT
REGISTER
The ADRES register contains the results of the last
conversion. These results are present during the
sampling period of the next analog conversion process.
After the sampling period is over, ADRES is cleared
(= 0). A ‘leading one’ is then right shifted into the
ADRES to serve as an internal conversion complete
bit. As each bit weight, starting with the MSB, is
converted, the leading one is shifted right and the
converted bit is stuffed into ADRES. After a total of nine
right shifts of the ‘leading one’ have taken place, the
conversion is complete; the ‘leading one’ has been
shifted out and the GO/DONE
bit is cleared.
If the GO/DONE
bit is cleared in software during a
conversion, the conversion stops and the ADIF bit will
not be set to a ‘1’. The data in ADRES is the partial
conversion result. This data is valid for the bit weights
that have been converted. The position of the ‘leading
one’ determines the number of bits that have been
converted. The bits that were not converted before the
GO/DONE
was cleared are unrecoverable.
REGISTER 9-1: ADCON0: A/D CONTROL REGISTER
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0
ADCS1 ADCS0 CHS3 CHS2 CHS1 CHS0 GO/DONE
ADON
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 ADCS<1:0>: ADC Conversion Clock Select bits
00 =F
OSC/16
01 =F
OSC/8
10 =F
OSC/4
11 = INTOSC/4
bit 5-2 CHS<3:0>: ADC Channel Select Bits
(1)
0000 = Channel 0 (RA0/AN0)
0001 = Channel 1 (RA1/AN1)
0010 = Channel 2 (RA2/AN2)
0011 = Channel 3 (RA4/AN3)
0100 = Channel 4 (RC0/AN4)
0101 = Channel 5 (RC1/AN5)
0110 = Channel 6 (RC2/AN6)
0111 = Channel 7 (RC3/AN7)
1xxx = Reserved
1111 = 0.6V reference from INTOSC
bit 1 GO/DONE: ADC Conversion Status Bit
(2)
1 = ADC conversion in progress. Setting this bit starts an ADC conversion cycle. This bit is automatically
cleared by hardware when the ADC is done converting.
0 = ADC conversion completed/not in progress. Manually clearing this bit while a conversion is in process
terminates the current conversion.
bit 0 ADON: ADC Enable bit
1 = ADC module is operating
0 = ADC module is shut-off and consumes no power
Note 1: CHS<3:0> bits default to 1 after any Reset.
2: If the ADON bit is clear, the GO/DONE
bit cannot be set.