Datasheet

 2012 Microchip Technology Inc. Preliminary DS41652A-page 55

PIC16F527

8.15 Register Definitions — Interrupt Control

R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0

ADIF CWIF T0IF RAIF

— — —

GIE

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 ADIF: A/D Converter Interrupt Flag bit

1 = A/D conversion complete (must be cleared by software)

0 = A/D conversion has not completed or has not been started

bit 6 CWIF: Comparator 1 or 2 Interrupt Flag bit

1 = Comparator interrupt-on-change has occurred

(1)

0 = No change in Comparator 1 or 2 output

bit 5 T0IF: Timer0 Overflow Interrupt Flag bit

1 = TMR0 register has overflowed (must be cleared by software)

0 = TMR0 register did not overflow

bit 4 RAIF: Port A Interrupt-on-change Flag bit

1 = Wake-up or interrupt has occurred (cleared in software)

(2)

0 = Wake-up or interrupt has not occurred

bit 3-1 Unimplemented: Read as ‘0’

bit 0 GIE: Global Interrupt Enable bit

1 = Interrupt sets PC to address 0x004 (Vector to ISR)

0 = Interrupt causes wake-up and inline code execution

Note 1: This bit only functions when the C1WU

or C2WU bits are set (see Register 10-1 and Register 10-2).

2: The RAWU

bit of the OPTION register must be set to enable this function (see Register 4-2).