Datasheet
PIC16F527
DS41652A-page 32 Preliminary 2012 Microchip Technology Inc.
REGISTER 6-3: PORTC: PORTC REGISTER
TABLE 6-4: PORTC PINS ORDER OF PRECEDENCE
REGISTER 6-4: ANSEL REGISTER
TABLE 6-5: REGISTERS ASSOCIATED WITH THE I/O PORTS
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 RC<7:0>: PORTC I/O Pin bits
1 = Port pin is >V
IH min.
0 = Port pin is <V
IL max.
Priority RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
1 OP1+ OP1- TRISC5 C2OUT OP1 OP2 C2IN- C2IN+
2
TRISC7 TRISC6
—
TRISC4 AN7 AN6 AN5 AN4
3
— — — — TRISC3 TRISC2 TRISC1 TRISC0
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 ANS<7:0>: ADC Analog Input Pin Select
(1), (2)
0 = Analog function on selected ANx pin is disabled
1 = ANx configured as an analog input
Note 1: When the ANSx bits are set, the channels selected will automatically be forced into Analog mode,
regardless of the pin function previously defined. The only exception to this is the comparator, where the
analog input to the comparator and the ADC will be active at the same time. It is the user’s responsibility to
ensure that the ADC loading on the comparator input does not affect their application.
2: The ANS<7:0> bits are active regardless of the condition of ADON.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
MCLR and
WDT Reset
N/A
TRIS
(1)
I/O Control Registers (TRISA, TRISB, TRISC)
(1)
1111 1111 1111 1111
06h PORTA
— — RA5 RA4 RA3 RA2 RA1 RA0 --xx xxxx --uu uuuu
07h PORTB RB7 RB6 RB5 RB4
— — — — xxxx ---- uuuu ----
27h PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0 xxxx xxxx uuuu uuuu
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’, Shaded cells = unimplemented, read as ‘0’
Note 1: TRISA3 is read-only ‘1’, and cannot be set as output.