Datasheet

 2012 Microchip Technology Inc. Preliminary DS41652A-page 31
PIC16F527
6.6 Register Definitions — PORT Control
REGISTER 6-1: PORTA: PORTA REGISTER
TABLE 6-1: PORTA PINS ORDER OF PRECEDENCE
TABLE 6-2: WEAK PULL-UP ENABLED PINS
REGISTER 6-2: PORTB: PORTB REGISTER
TABLE 6-3: PORTB PINS ORDER OF
PRECEDENCE
U-0 U-0 R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
— —
RA5 RA4 RA3 RA2 RA1 RA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-0 RA<5:0>: PORTA I/O Pin bits
1 = Port pin is >V
IH min.
0 = Port pin is <V
IL max.
Priority RA5 RA4 RA3 RA2 RA1 RA0
1 OSC1 OSC2 RA3/MCLR
AN2 CVREF AN0
2CLKINCLKOUT
— C1OUT AN1 C1IN+
3 TRISA5 AN3
— T0CKI C1IN- TRISA0
4
— TRISA5 — TRISA2 TRISA1 —
Device RA0 Weak Pull-up RA1 Weak Pull-up RA3 Weak Pull-up
(1)
RA4 Weak Pull-up
PIC16F527 Yes Yes Yes Yes
Note 1: When MCLREN = 1, the weak pull-up on M
CLR is always enabled.
R/W-x R/W-x R/W-x R/W-x U-0 U-0 U-0 U-0
RB7 RB6 RB5 RB4
— — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 RB<7:4>: PORTB I/O Pin bits
1 = Port pin is >V
IH min.
0 = Port pin is <V
IL max.
bit 3-0 Unimplemented: Read as ‘0’
Priority RB7 RB6 RB5 RB4
1
TRISB7 TRISB6 OP2+ OP2-
2
— — TRISB5 TRISB4