Datasheet

PIC16F527
DS41652A-page 30 Preliminary  2012 Microchip Technology Inc.
6.5 I/O Interfacing
The equivalent circuit for an I/O port pin is shown in
Figure 6-1. All port pins, except the MCLR
pin which is
input-only, may be used for both input and output oper-
ations. For input operations, these ports are non-latch-
ing. Any input must be present until read by an input
instruction (e.g., MOVF PORTB, W). The outputs are
latched and remain unchanged until the output latch is
rewritten. To use a port pin as output, the correspond-
ing direction control bit in TRIS must be cleared (= 0).
For use as an input, the corresponding TRIS bit must
be set. Any I/O pin (except MCLR
) can be programmed
individually as input or output.
FIGURE 6-1: BLOCK DIAGRAM OF I/O
PIN (Example shown of
RA2 with Weak Pull-up
and Wake-up on change)
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
2: Pin enabled as analog for ADC or comparator.
D
CK
Q
Pin Change
RxPU
ADC pin Ebl
COMP pin Ebl
ADC
COMP
I/O Pin
(1)
(2)
(2)