Datasheet

 2010 Microchip Technology Inc. DS41326E-page 35
PIC16F526
TABLE 6-2: SUMMARY OF PORT REGISTERS
TABLE 6-3: I/O PINS ORDER OF PRECEDENCE
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
All Other
Resets
N/A TRIS — — I/O Control Register (PORTB, PORTC) --11 1111 --11 1111
N/A OPTION RBWU
RBPU TOCS TOSE PSA PS2 PS1 PS0 1111 1111 1111 1111
03h STATUS RBWUF
CWUF PA0 TO PD Z DC C 0001 1xxx qq0q quuu
(1)
06h PORTB — — RB5 RB4 RB3 RB2 RB1 RB0 --xx xxxx --uu uuuu
07h PORTC
— — RC5 RC4 RC3 RC2 RC1 RC0 --xx xxxx --uu uuuu
Legend: Shaded cells are not used by PORT registers, read as ‘0’. – = unimplemented, read as ‘0’, x = unknown,
u = unchanged,
q = depends on condition.
Note 1: If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.
Priority RB0 RB1 RB2 RB3 RC0 RC1 RC2 RC4 RC5
1 AN0 AN1 AN2 RB3/MCLR
C2IN+ C2IN- CVREF C2OUT T0CKI
2 C1IN+ C1IN- C1OUT
— TRISC TRISC TRISC TRISC TRISC
3 TRISB TRISB TRISB
— — — — — —