Datasheet
PIC16F526
DS41326E-page 32 2010 Microchip Technology Inc.
FIGURE 6-6: BLOCK DIAGRAM OF
RC0/RC1
FIGURE 6-7: BLOCK DIAGRAM OF RC2
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
I/O
pin
(1)
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
Comp Pin Enable
COMP2
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
0
1
VROE
I/O PIN
(1)
CVREF