Datasheet

PIC16F526
DS41326E-page 30 2010 Microchip Technology Inc.
FIGURE 6-2: BLOCK DIAGRAM OF RB2 FIGURE 6-3: BLOCK DIAGRAM OF RB3
(with Weak Pull-up and
Wake-up on Change)
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
0
1
C1OUTEN
ADC
C1OUT
ADC Pin Enable
I/O Pin
(1)
Data Bus
RD Port
Note 1: RB3/MCLR pin has a protection diode to VSS
only.
GPPU
D
CK
Q
Pin Change
MCLRE
RBPU
Reset
Input Pin