Datasheet

PIC16F526
DS41326E-page 12 2010 Microchip Technology Inc.
FIGURE 3-1: PIC16F526 BLOCK DIAGRAM
11
Data Bus
8
12
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
5
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Device Reset
Power-on
Reset
Watchdog
Timer
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
MCLR
VDD, VSS
Timer0
PORTB
8
8
RB4/OSC2/CLKOUT
RB3/MCLR/VPP
RB2
RB1/ICSPCLK
RB0/ICSPDAT
5-7
3
RB5/OSC1/CLKIN
STACK1
STACK2
67
Internal RC
Clock
bytes
Timer
PORTC
RC4
RC3
RC2
RC1
RC0
RC5/T0CKI
Comparator 2
C1IN+
C1IN-
C1OUT
C2IN+
C2IN-
C2OUT
AN0
AN1
AN2
VREF
8-bit ADC
CVREF
CVREF
CVREF
VREF
Comparator 1
Flash Program
Memory
1K x 12
Memory
64x8
Flash Data