Datasheet

PIC12F510/16F506
DS41268D-page 64 © 2007 Microchip Technology Inc.
FIGURE 10-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
FIGURE 10-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR
PULLED LOW)
FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE
TIME
SQ
R
Q
VDD
(GP3/RB3)/MCLR/VPP
Power-up
Detect
POR (Power-on Reset)
WDT Reset
CHIP Reset
MCLRE
Wake-up on pin Change Reset
Start-up Timer
(10 ms, 1.125 ms
WDT Time-out
Pin Change
Sleep
MCLR
Reset
or 18 ms)
Comparator Change
Wake-up on
Comparator Change
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT