Datasheet

© 2007 Microchip Technology Inc. DS41268D-page 49
PIC12F510/16F506
8.0 COMPARATOR VOLTAGE
REFERENCE MODULE
(PIC16F506 ONLY)
The comparator voltage reference module also allows
the selection of an internally generated voltage refer-
ence for one of the C2 comparator inputs. The VRCON
register (Register 8-1) controls the voltage reference
module shown in Figure 8-1.
8.1 Configuring The Voltage
Reference
The voltage reference can output 32 voltage levels; 16
in a high range and 16 in a low range.
Equation 8-1 determines the output voltages:
EQUATION 8-1:
8.2 Voltage Reference Accuracy/Error
The full range of VSS to VDD cannot be realized due to
construction of the module. The transistors on the top
and bottom of the resistor ladder network (Figure 8-1)
keep CV
REF from approaching VSS or VDD. The excep-
tion is when the module is disabled by clearing the
VREN bit (VRCON<7>). When disabled, the reference
voltage is V
SS when VR<3:0> is ‘0000’ and the VRR
(VRCON<5>) bit is set. This allows the comparator to
detect a zero-crossing and not consume the CV
REF
module current.
The voltage reference is V
DD derived and, therefore,
the CV
REF output changes with fluctuations in VDD. The
tested absolute accuracy of the comparator voltage
reference can be found in Section 13.2 “DC Charac-
teristics: PIC12F510/16F506 (Extended)”.
VRR = 1 (low range): CVREF = (VR<3:0>/24) x VDD
VRR = 0 (high range):
CV
REF = (VDD/4) + (VR<3:0> x VDD/32)
REGISTER 8-1: VRCON: VOLTAGE REFERENCE CONTROL REGISTER (PIC16F506 ONLY)
R/W-0 R/W-0 R/W-1 U-1 R/W-1 R/W-1 R/W-1 R/W-1
VREN VROE VRR —VR3VR2VR1VR0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’, except if denoted
otherwise
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 VREN: CV
REF Enable bit
1 = CV
REF is powered on
0 = CV
REF is powered down, no current is drawn
bit 6 VROE: CV
REF Output Enable bit
(1)
1 = CVREF output is enabled
0 = CV
REF output is disabled
bit 5 VRR: CVREF Range Selection bit
1 = Low range
0 = High range
bit 4 Unimplemented: Read as ‘1’
bit 3-0 VR<3:0> CV
REF Value Selection bit
When V
RR = 1: CVREF= (VR<3:0>/24)*VDD
When VRR = 0: CVREF= VDD/4+(VR<3:0>/32)*VDD
Note 1: When this bit is set, the TRIS for the CVREF pin is overridden and the analog voltage is placed on the
CV
REF pin.
2: CVREF controls for ratio metric reference applies to Comparator 2 on the PIC16F506 only.