Datasheet

PIC12F510/16F506
DS41268D-page 34 © 2007 Microchip Technology Inc.
TABLE 5-1: SUMMARY OF PORT REGISTERS
TABLE 5-2: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506)
TABLE 5-3: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506)
TABLE 5-4: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC12F510)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
All Other
Resets
N/A TRISGPIO
(1)
— — I/O Control Register --11 1111 --11 1111
N/A TRISB
(2)
— — I/O Control Register --11 1111 --11 1111
N/A TRISC
(2)
— — I/O Control Register --11 1111 --11 1111
N/A OPTION
(1)
GPWU GPPU T0CS TOSE PSA PS2 PS1 PS0 1111 1111 1111 1111
N/A OPTION
(2)
RBWU RBPU T0CS TOSE PSA PS2 PS1 PS0 1111 1111 1111 1111
03h STATUS
(1)
GPWUF CWUF PA0 TO PD ZDCC0001 1xxx qq0q quuu
(3)
03h STATUS
(2)
RBWUF CWUF PA0 TO PD ZDCC0001 1xxx qq0q quuu
(3)
06h GPIO
(1)
— — GP5 GP4 GP3 GP2 GP1 GP0 --xx xxxx --uu uuuu
06h PORTB
(2)
— — RB5 RB4 RB3 RB2 RB1 RB0 --xx xxxx --uu uuuu
07h PORTC
(2)
— — RC5 RC4 RC3 RC2 RC1 RC0 --xx xxxx --uu uuuu
Legend: – = unimplemented read as ‘0’, x = unknown, u = unchanged, q = depends on condition.
Note 1: PIC12F510 only.
2: PIC16F506 only.
3: If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.
Priority RB0 RB1 RB2 RB3 RB4 RB5
1 AN0/C1IN+ AN1/C1IN- AN2 Input/MCLR OSC2/CLKOUT OSC1/CLKIN
2 TRISB TRISB C1OUT —TRISB TRISB
3 — —TRISB— — —
Priority RC0 RC1 RC2 RC3 RC4 RC5
1C2IN+ C2IN-CV
REF TRISC C2OUT T0CKI
2 TRISC TRISC TRISC —TRISCTRISC
Priority GP0 GP1 GP2 GP3 GP4 GP5
1 AN0/C1IN+ AN1/C1IN- AN2 Input/MCLR OSC2 OSC1/CLKIN
2 TRISIO TRISIO C1OUT — TRISIO TRISIO
3 — —T0CKI— — —
4 — —TRISIO— — —