Datasheet

© 2007 Microchip Technology Inc. DS41268D-page 31
PIC12F510/16F506
FIGURE 5-8: BLOCK DIAGRAM OF
RB5/GP5
FIGURE 5-9: BLOCK DIAGRAM OF
RC0/RC1
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
I/O
pin
(1)
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
2: Input mode is disabled when pin is used for
oscillator.
Oscillator
Circuit
OSC2
(Note 2)
Data
Bus
QD
Q
CK
QD
Q
CK
WR
Port
TRIS ‘f’
Data
TRIS
RD Port
I/O
pin
(1)
W
Reg
Latch
Latch
Reset
Note 1: I/O pins have protection diodes to VDD and
V
SS.
Comp Pin Enable
COMP2