Datasheet
PIC12F510/16F506
DS41268D-page 16 © 2007 Microchip Technology Inc.
4.2 Data Memory Organization
Data memory is composed of registers or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers (SFRs)
and General Purpose Registers (GPRs).
The Special Function Registers include the TMR0
register, the Program Counter (PCL), the STATUS
register, the I/O registers (ports) and the File Select
Register (FSR). In addition, Special Function Registers
are used to control the I/O port configuration and
prescaler options.
The General Purpose Registers are used for data and
control information under command of the instructions.
For the PIC12F510, the register file is composed of 10
Special Function Registers, 6 General Purpose
Registers and 32 General Purpose Registers accessed
by banking (see Figure 4-2).
For the PIC16F506, the register file is composed of 13
Special Function Registers, 3 General Purpose
Registers and 64 General Purpose Registers,
accessed by banking (see Figure 4-3).
4.2.1 GENERAL PURPOSE REGISTER
FILE
The General Purpose Register file is accessed either
directly or indirectly through the File Select Register
(FSR). See Section 4.8 “Indirect Data Addressing:
INDF and FSR Registers”.
FIGURE 4-2: PIC12F510 REGISTER
FILE MAP
FIGURE 4-3: PIC16F506 REGISTER FILE MAP
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF
(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
0Fh
10h
Bank 0 Bank 1
3Fh
30h
20h
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
08h
Addresses
map back to
addresses in
Bank 0.
Note 1: Not a physical register.
FSR<5> 0 1
CM1CON0
2Fh
09h
0Ah
ADCON0
ADRES
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF
(1)
TMR0
PCL
STATUS
FSR
OSCCAL
PORTB
10h
Bank 0 Bank 1 Bank 2 Bank 3
3Fh
30h
20h
5Fh
50h
40h
7Fh
70h
60h
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
PORTC
08h
Addresses map back to
addresses in Bank 0.
Note 1: Not a physical register.
FSR<6:5> 00 01 10 11
2Fh 4Fh 6Fh
0Dh
CM1CON0
CM2CON0
VRCON
09h
0Ah
0Bh
ADRES
ADCON0
0Ch
0Fh