Datasheet

PIC12F510/16F506
DS41268D-page 12 © 2007 Microchip Technology Inc.
FIGURE 3-2: PIC16F506 SERIES BLOCK DIAGRAM
Flash
Program
Memory
10
Data Bus
8
10
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
5
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Device Reset
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
MCLR
VDD, VSS
Timer0
PORTB
8
8
RB4
RB3
RB2
RB1/ICSPCLK
RB0/ICSPDAT
5-7
3
RB5
STACK 1
STACK 2
Internal RC
Clock
1K x 12
67 bytes
Timer
PORTC
RC4
RC3
RC2
RC1
RC0
RC5
Comparator 2
C1IN+
C1IN-
C1OUT
C2IN+
C2IN-
C2OUT
AN0
AN1
AN2
8-bit ADC
CVREF
CVREF
CVREF
Comparator 1
0.6V Reference
T0CKI