Datasheet

PIC12F508/509/16F505
DS41236B-page 76 Preliminary © 2005 Microchip Technology Inc.
TABLE 10-5: TIMING REQUIREMENTS – PIC12F508/509/16F505
FIGURE 10-6: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER TIMING –
PIC12F508/509/16F505
AC
CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +85°C (industrial)
-40°C ≤ T
A ≤ +125°C (extended)
Operating Voltage V
DD range is described in Section 10.1 "DC Characteristics"
Param
No.
Sym Characteristic Min Typ
(1)
Max Units
17 T
OSH2IOVOSC1↑ (Q1 cycle) to Port Out Valid
(2), (3)
— — 100* ns
18 TOSH2IOIOSC1↑ (Q2 cycle) to Port Input Invalid (I/O in hold time)
(2)
TBD — — ns
19 T
IOV2OSH Port Input Valid to OSC1↑ (I/O in setup time) TBD — — ns
20 T
IOR Port Output Rise Time
(3)
—1025**ns
21 T
IOF Port Output Fall Time
(3)
—1025**ns
Legend: TBD = To Be Determined.
* These parameters are characterized but not tested.
** These parameters are design targets and are not tested.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: Measurements are taken in EXTRC mode.
3: See Figure 10-3 for loading conditions.
VDD
MCLR
Internal
POR
DRT
Timeout
(2)
Internal
Reset
Watchdog
Timer
Reset
32
31
34
I/O pin
(1)
32
32
34
30
Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software.
2: Runs in MCLR
or WDT Reset only in XT, LP and HS (PIC16F505) modes.