Datasheet

© 2005 Microchip Technology Inc. Preliminary DS41236B-page 71
PIC12F508/509/16F505
TABLE 10-1: DC CHARACTERISTICS: PIC12F508/509/16F505 (Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature -40°C ≤ T
A ≤ +85°C (industrial)
-40°C ≤ T
A ≤ +125°C (extended)
Operating voltage V
DD range as described in DC specification
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
V
IL Input Low Voltage
I/O ports:
D030 with TTL buffer Vss — 0.8V V For all 4.5 ≤ V
DD ≤ 5.5V
D030A Vss — 0.15 V
DD V Otherwise
D031 with Schmitt Trigger buffer Vss — 0.15 V
DD V
D032 MCLR
, T0CKI Vss — 0.15 VDD V
D033 OSC1 (in EXTRC) Vss — 0.15 V
DD V (Note1)
D033 OSC1 (in HS) Vss — 0.3 V
DD V (Note1)
D033 OSC1 (in XT and LP) Vss — 0.3 V (Note1)
V
IH Input High Voltage
I/O ports: —
D040 with TTL buffer 2.0 — V
DD V4.5 ≤ VDD ≤ 5.5V
D040A 0.25 V
DD
+ 0.8 VDD
—VDD V Otherwise
D041 with Schmitt Trigger buffer 0.85 V
DD —VDD V For entire VDD range
D042 MCLR, T0CKI 0.85 V
DD —VDD V
D043 OSC1 (in EXTRC) 0.85 V
DD —VDD V (Note1)
D043 OSC1 (in HS) 0.7 V
DD —VDD V (Note1)
D043 OSC1 (in XT and LP) 1.6 — V
DD V
D070 I
PUR GPIO weak pull-up current
(4)
TBD 250 TBD μAVDD = 5V, VPIN = VSS
IIL Input Leakage Current
(2), (3)
D060 I/O ports — — ± 1 μAVss ≤ VPIN ≤ VDD, Pin at high-impedance
D061 GP3/RB3/MCLR
I
(5)
——± 30μAVss ≤ VPIN ≤ VDD
D061A GP3/RB3/MCLRI
(6)
——± 5μAVss ≤ VPIN ≤ VDD
D063 OSC1 — — ± 5 μAVss ≤ VPIN ≤ VDD, XT, HS and LP oscillator
configuration
Output Low Voltage
D080 I/O ports/CLKOUT — — 0.6 V I
OL = 8.5 mA, VDD = 4.5V, -40°C to +85°C
D080A — — 0.6 V I
OL = 7.0 mA, VDD = 4.5V, -40°C to +125°C
D083 OSC2 — — 0.6 V I
OL = 1.6 mA, VDD = 4.5V, -40°C to +85°C
D083A — — 0.6 V I
OL = 1.2 mA, VDD = 4.5V, -40°C to +125°C
Output High Voltage
D090 I/O ports/CLKOUT
(3)
VDD – 0.7 — — V IOH = -3.0 mA, VDD = 4.5V, -40°C to +85°C
D090A V
DD – 0.7 — — V IOH = -2.5 mA, VDD = 4.5V, -40°C to +125°C
D092 OSC2 V
DD – 0.7 — — V IOH = -1.3 mA, VDD = 4.5V, -40°C to +85°C
D092A V
DD – 0.7 — — V IOH = -1.0 mA, VDD = 4.5V, -40°C to +125°C
Capacitive Loading Specs on
Output Pins
D100 OSC2 pin — — 15 pF In XT, HS and LP modes when external clock is
used to drive OSC1.
D101 All I/O pins and OSC2 — — 50 pF
Legend: TBD = To Be Determined.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12F508/509/
16F505 be driven with external clock in RC mode.
2: The leakage current on the MCLR
pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
4: Does not include GP3/RB3. For GP3/RB3 see parameters D061 and D061A.
5: This specification applies to GP3/RB3/MCLR
configured as external MCLR and GP3/RB3/MCLR configured as input with internal pull-up
enabled.
6: This specification applies when GP3/RB3/MCLR
is configured as an input with pull-up disabled. The leakage current of the MCLR circuit
is higher than the standard I/O logic.