Datasheet

PIC12F508/509/16F505
DS41236B-page 44 Preliminary © 2005 Microchip Technology Inc.
7.3 Reset
The device differentiates between various kinds of
Reset:
• Power-on Reset (POR)
•MCLR
Reset during normal operation
•MCLR
Reset during Sleep
• WDT time-out Reset during normal operation
• WDT time-out Reset during Sleep
• Wake-up from Sleep on pin change
Some registers are not reset in any way, they are
unknown on POR and unchanged in any other Reset.
Most other registers are reset to “Reset state” on
Power-on Reset (POR), MCLR
, WDT or Wake-up on
pin change Reset during normal operation. They are
not affected by a WDT Reset during Sleep or MCLR
Reset during Sleep, since these Resets are viewed as
resumption of normal operation. The exceptions to this
are TO, PD and RBWUF/GPWUF bits. They are set or
cleared differently in different Reset situations. These
bits are used in software to determine the nature of
Reset. See Table 7-4 for a full description of Reset
states of all registers.
7.3.1 EXTERNAL CLOCK IN
For applications where a clock is already available
elsewhere, users may directly drive the PIC12F508/
509/16F505 devices provided that this external clock
source meets the AC/DC timing requirements listed in
Section 7.6 “Watchdog Timer (WDT)”. Figure 7-6
below shows how an external clock circuit should be
configured.
FIGURE 7-6: EXTERNAL CLOCK INPUT
OPERATION
TABLE 7-3: RESET CONDITIONS FOR REGISTERS – PIC12F508/509
Clock From
ext. system
PIC16F505
OSC2/CLKOUT/RB4
RB5/OSC1/CLKIN
OSC2/CLKOUT/RB4
(1)
Clock From
ext. system
OSC2
GP5/OSC1/CLKIN
GP4/OSC2
PIC12F508
PIC12F509
PIC16F505: EC, HS, XT, LP
PIC12F508/509: XT, LP
Note 1: RB4 is available in EC mode only.
Register Address Power-on Reset
MCLR
Reset, WDT Time-out,
Wake-up On Pin Change
W—qqqq qqqu
(1)
qqqq qqqu
(1)
INDF 00h xxxx xxxx uuuu uuuu
TMR0 01h xxxx xxxx uuuu uuuu
PC 02h 1111 1111 1111 1111
STATUS 03h 0001 1xxx q00q quuu
(2), (3)
FSR
(4)
04h 110x xxxx 11uu uuuu
FSR
(5)
04h 111x xxxx 111u uuuu
OSCCAL 05h 1111 111- uuuu uuu-
GPIO 06h --xx xxxx --uu uuuu
OPTION — 1111 1111 1111 1111
TRIS — --11 1111 --11 1111
Legend: u = unchanged, x = unknown, – = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: Bits <7:2> of W register contain oscillator calibration values due to MOVLW XX instruction at top of mem-
ory.
2: See Table 7-8 for Reset value for specific conditions.
3: If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.
4: PIC12F509 only.
5: PIC12F508 only.