Datasheet

PIC12F508/509/16F505
DS41236B-page 34 Preliminary © 2005 Microchip Technology Inc.
FIGURE 6-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TABLE 6-1: REGISTERS ASSOCIATED WITH TIMER0
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
All Other
Resets
01h TMR0 Timer0 – 8-bit Real-Time Clock/Counter xxxx xxxx
uuuu uuuu
N/A OPTION
(1)
GPWU GPPU T0CS T0SE PSA PS2 PS1 PS0 1111 1111
1111 1111
N/A OPTION
(2)
RBWU RBPU T0CS T0SE PSA PS2 PS1 PS0 1111 1111
1111 1111
N/A TRISGPIO
(1), (3)
— — I/O Control Register --11 1111
--11 1111
N/A TRISC
(2), (3)
— — RC5 RC4 RC3 RC2 RC1 RC0 --11 1111
--11 1111
Legend: Shaded cells are not used by Timer0. – = unimplemented, x = unknown, u = unchanged.
Note 1: PIC12F508/509 only.
2: PIC16F505 only.
3: The TRIS of the T0CKI pin is overridden when T0CS = 1.
PC – 1
Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Instruction
Fetch
Timer0
PC PC + 1 PC + 2 PC + 3 PC + 4 PC + 6
T0
T0 + 1 NT0
NT0 + 1
MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
Write TMR0
executed
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0 + 1
Read TMR0
reads NT0 + 2
Instruction
Executed
PC + 5
PC
(Program
Counter)