Datasheet

PIC12F508/509/16F505

TABLE 4-2: SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC16F505)

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Value on

Power-On

Reset

(2)

Page #

00h INDF Uses Contents of FSR to Address Data Memory (not a physical

xxxx xxxx 26

01h TMR0 8-bit Real-Time Clock/Counter xxxx xxxx 33

02h

(1)

PCL Low-order 8 bits of PC 1111 1111 25

03h STATUS RBWUF

—PA0TO PD ZDCC0-01 1xxx 20

04h FSR Indirect Data Memory Address Pointer 110x xxxx 26

05h OSCCAL CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 — 1111 111- 24

06h PORTB

— — RB5 RB4 RB3 RB2 RB1 RB0 --xx xxxx 29

07h PORTC — — RC5 RC4 RC3 RC2 RC1 RC0 --xx xxxx 29

N/A TRISB — — I/O Control Register --11 1111 29

N/A TRISC

— — I/O Control Register --11 1111 29

N/A OPTION RBWU

RBPU TOCS TOSE PSA PS2 PS1 PS0 1111 1111 23

Legend: – = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.

Note 1: If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.

2: Other (non Power-up) Resets include external reset through MCLR

, Watchdog Timer and wake-up on pin

change Reset.