Datasheet

PIC12F508/509/16F505
DS41236B-page 18 Preliminary © 2005 Microchip Technology Inc.
4.3.2 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 4-1: SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC12F508/509)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
(2)
Page #
00h INDF Uses Contents of FSR to Address Data Memory (not a physical
register)
xxxx xxxx 26
01h TMR0 8-bit Real-Time Clock/Counter xxxx xxxx 33
02h
(1)
PCL Low-order 8 bits of PC 1111 1111 25
03h STATUS GPWU
F
—PA0
(5)
TO PD ZDCC0-01 1xxx
(3)
20
04h FSR Indirect Data Memory Address Pointer 111x xxxx 26
04h
(4)
FSR Indirect Data Memory Address Pointer 110x xxxx 26
05h OSCCAL CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 — 1111 111- 24
06h GPIO
— — GP5 GP4 GP3 GP2 GP1 GP0 --xx xxxx 29
N/A TRISGPIO — — I/O Control Register --11 1111 29
N/A OPTION GPWU
GPPU TOCS TOSE PSA PS2 PS1 PS0 1111 1111 22
Legend: – = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.
Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter”
for an explanation of how to access these bits.
2: Other (non Power-up) Resets include external Reset through MCLR
, Watchdog Timer and wake-up on pin
change Reset.
3: If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.
4: PIC12F509 only.
5: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508.