Datasheet

 2011-2013 Microchip Technology Inc. DS40001574C-page 79
PIC16(L)F1938/9
FIGURE 6-2: BROWN-OUT SITUATIONS
6.3 Register Definitions: BOR Control
TPWRT
(1)
VBOR
V
DD
Internal
Reset
VBOR
V
DD
Internal
Reset
TPWRT
(1)
< TPWRT
TPWRT
(1)
VBOR
V
DD
Internal
Reset
Note 1: TPWRT delay only if PWRTE bit is programmed to ‘0’.
REGISTER 6-1: BORCON: BROWN-OUT RESET CONTROL REGISTER
R/W-1/u U-0 U-0 U-0 U-0 U-0 U-0 R-q/u
SBOREN
— — — — — —BORRDY
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition
bit 7 SBOREN: Software Brown-out Reset Enable bit
If BOREN <1:0> in Configuration Word
s  01:
SBOREN is read/write, but has no effect on the BOR.
If BOREN <1:0> in Configuration Word
s = 01:
1 = BOR Enabled
0 = BOR Disabled
bit 6-1 Unimplemented: Read as ‘0’
bit 0 BORRDY: Brown-out Reset Circuit Ready Status bit
1 = The Brown-out Reset circuit is active
0 = The Brown-out Reset circuit is inactive