Datasheet

PIC16(L)F1938/9
DS40001574C-page 42  2011-2013 Microchip Technology Inc.
Bank 15
780h
(2)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
781h
(2)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
782h
(2)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
783h
(2)
STATUS — — —TOPD ZDCC---1 1000 ---q quuu
784h
(2)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
785h
(2)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
786h
(2)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
787h
(2)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
788h
(2)
BSR — — — BSR<4:0> ---0 0000 ---0 0000
789h
(2)
WREG Working Register 0000 0000 uuuu uuuu
78Ah
(1, 2)
PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
78Bh
(2)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 0000 0000 0000
78Ch
— Unimplemented — —
78Dh
— Unimplemented — —
78Eh
— Unimplemented — —
78Fh
— Unimplemented — —
790h
— Unimplemented — —
791h LCDCON LCDEN SLPEN WERR
—CS<1:0> LMUX<1:0> 000- 0011 000- 0011
792h LCDPS WFT BIASMD LCDA WA LP
<3:0> 0000 0000 0000 0000
793h LCDREF LCDIRE LCDIRS LCDIRI
— VLCD3PE VLCD2PE VLCD1PE — 000- 000- 000- 000-
794h LCDCST
— — — — — LCDCST<2:0> ---- -000 ---- -000
795h LCDRL LRLAP
<1:0> LRLBP<1:0> —LRLAT<2:0> 0000 -000 0000 -000
796h
— Unimplemented — —
797h
— Unimplemented — —
798h LCDSE0 SE<7:0> 0000 0000 uuuu uuuu
799h LCDSE1 SE<15:8> 0000 0000 uuuu uuuu
79Ah LCDSE2
(3)
SE<23:16> 0000 0000 uuuu uuuu
79Bh
— Unimplemented — —
79Ch
— Unimplemented — —
79Dh
— Unimplemented — —
79Eh
— Unimplemented — —
79Fh
— Unimplemented — —
7A0h LCDDATA0 SEG7
COM0
SEG6
COM0
SEG5
COM0
SEG4
COM0
SEG3
COM0
SEG2
COM0
SEG1
COM0
SEG0
COM0
xxxx xxxx uuuu uuuu
7A1h LCDDATA1 SEG15
COM0
SEG14
COM0
SEG13
COM0
SEG12
COM0
SEG11
COM0
SEG10
COM0
SEG9
COM0
SEG8
COM0
xxxx xxxx uuuu uuuu
7A2h
LCDDATA2
(3)
SEG23
COM0
SEG22
COM0
SEG21
COM0
SEG20
COM0
SEG19
COM0
SEG18
COM0
SEG17
COM0
SEG16
COM0
xxxx xxxx uuuu uuuu
7A3h LCDDATA3 SEG7
COM1
SEG6
COM1
SEG5
COM1
SEG4
COM1
SEG3
COM1
SEG2
COM1
SEG1
COM1
SEG0
COM1
xxxx xxxx uuuu uuuu
7A4h LCDDATA4 SEG15
COM1
SEG14
COM1
SEG13
COM1
SEG12
COM1
SEG11
COM1
SEG10
COM1
SEG9
COM1
SEG8
COM1
xxxx xxxx uuuu uuuu
7A5h
LCDDATA5
(3)
SEG23
COM1
SEG22
COM1
SEG21
COM1
SEG20
COM1
SEG19
COM1
SEG18
COM1
SEG17
COM1
SEG16
COM1
xxxx xxxx uuuu uuuu
TABLE 3-10: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are
transferred to the upper byte of the program counter.
2: These registers can be addressed from any bank.
3: These registers/bits are not implemented on PIC16(L)F1938 devices, read as ‘0’.
4: Unimplemented, read as ‘1’.