Datasheet

2011-2013 Microchip Technology Inc. DS40001574C-page 393
PIC16(L)F1938/9
TABLE 30-2: OSCILLATOR PARAMETERS
TABLE 30-3: PLL CLOCK TIMING SPECIFICATIONS (V
DD = 2.7V TO 5.5V)
FIGURE 30-7: CLKOUT AND I/O TIMING
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param
No.
Sym. Characteristic
Freq.
Tolerance
Min. Typ† Max. Units Conditions
OS08 HFOSC Internal Calibrated HFINTOSC
Frequency
(1)
±2%
±3%
16.0
16.0
MHz
MHz
0°C TA +60°C, VDD 2.5V
60°C
TA 85°C, VDD 2.5V
±5% 16.0 MHz -40°C
TA +125°C
OS08A MF
OSC Internal Calibrated MFINTOSC
Frequency
(1)
±2%
±3%
500
500
kHz
kHz
0°C TA +60°C, VDD 2.5V
60°C
TA 85°C, VDD 2.5V
±5% 500 kHz -40°C
TA +125°C
OS09 LF
OSC Internal LFINTOSC Frequency 31 kHz -40°C TA +125°C
OS10* T
IOSC ST HFINTOSC
Wake-up from Sleep Start-up Time
MFINTOSC
Wake-up from Sleep Start-up Time
——3.28
s
24 35
s
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1
F and 0.01 F values in parallel are recommended.
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
F10 FOSC Oscillator Frequency Range 4 8 MHz
F11 F
SYS On-Chip VCO System Frequency 16 32 MHz
F12 T
RC PLL Start-up Time (Lock Time) 2 ms
F13*
CLK CLKOUT Stability (Jitter) -0.25% +0.25% %
* These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25
C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FOSC
CLKOUT
I/O pin
(Input)
I/O pin
(Output)
Q4
Q1
Q2 Q3
OS11
OS19
OS13
OS15
OS18, OS19
OS20
OS21
OS17
OS16
OS14
OS12
OS18
Old Value
New Value
Write Fetch Read ExecuteCycle