Datasheet

 2011-2013 Microchip Technology Inc. DS40001574C-page 335
PIC16(L)F1938/9
27.5.3 AUTOMATIC POWER MODE
SWITCHING
As an LCD segment is electrically only a capacitor, cur-
rent is drawn only during the interval where the voltage
is switching. To minimize total device current, the LCD
internal reference ladder can be operated in a different
power mode for the transition portion of the duration.
This is controlled by the LCDRL Register
(Register 27-7).
The LCDRL register allows switching between two
power modes, designated ‘A’ and ‘B’. ‘A’ Power mode
is active for a programmable time, beginning at the
time when the LCD segments transition. ‘B’ Power
mode is the remaining time before the segments or
commons change again. The LRLAT<2:0> bits select
how long, if any, that the ‘A’ Power mode is active.
Refer to Figure 27-4.
To implement this, the 5-bit prescaler used to divide
the 32 kHz clock down to the LCD controller’s 1 kHz
base rate is used to select the power mode.
FIGURE 27-4: LCD INTERNAL REFERENCE LADDER POWER MODE SWITCHING DIAGRAM –
TYPE A
Single Segment Time
‘H00 ‘H01 ‘H02 ‘H03 ‘H04 ‘H05 ‘H06 ‘H07 ‘H0E ‘H0F ‘H00 ‘H01
‘H3
Power Mode A Power Mode B Mode A
LRLAT<2:0>
32 kHz Clock
Ladder Power
Segment Clock
LRLAT<2:0>
Segment Data
Power Mode
COM0
SEG0
COM0-SEG0
Control
V
0
V
1
V
0
V
1
V
0
V
1
-V
1