Datasheet

 2009 Microchip Technology Inc. Preliminary DS41364D-page 499
PIC16F193X/LF193X
Asynchronous Mode ................................................. 289
12-bit Break Transmit and Receive .................. 307
Associated Registers
Receive..................................................... 295
Transmit.................................................... 291
Auto-Wake-up on Break ................................... 305
Baud Rate Generator (BRG) ............................ 299
Clock Accuracy ................................................. 296
Receiver............................................................ 292
Setting up 9-bit Mode with Address Detect....... 294
Transmitter........................................................ 289
Baud Rate Generator (BRG)
Auto Baud Rate Detect ..................................... 304
Baud Rate Error, Calculating ............................ 299
Baud Rates, Asynchronous Modes .................. 301
Formulas...........................................................300
High Baud Rate Select (BRGH Bit) .................. 299
Synchronous Master Mode ............................... 308, 312
Associated Registers
Receive..................................................... 311
Transmit.................................................... 309
Reception.......................................................... 310
Transmission .................................................... 308
Synchronous Slave Mode
Associated Registers
Receive..................................................... 313
Transmit.................................................... 312
Reception.......................................................... 313
Transmission .................................................... 312
Extended Instruction Set
ADDFSR ................................................................... 367
F
Fail-Safe Clock Monitor....................................................... 78
Fail-Safe Condition Clearing....................................... 78
Fail-Safe Detection ..................................................... 78
Fail-Safe Operation..................................................... 78
Reset or Wake-up from Sleep..................................... 78
Firmware Instructions........................................................ 363
Fixed Voltage Reference (FVR)
Associated Registers ................................................ 152
Flash Program Memory .................................................... 113
Erasing...................................................................... 118
Modifying................................................................... 122
Writing....................................................................... 118
FSR Register39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 51, 52
FVRCON (Fixed Voltage Reference Control) Register..... 152
I
I
2
C Mode (MSSP)
Acknowledge Sequence Timing................................ 274
Bus Collision
During a Repeated Start Condition................... 278
During a Stop Condition.................................... 279
Effects of a Reset...................................................... 275
I
2
C Clock Rate w/BRG.............................................. 281
Master Mode
Operation .......................................................... 266
Reception.......................................................... 272
Start Condition Timing .............................. 268, 269
Transmission .................................................... 270
Multi-Master Communication, Bus Collision
and Arbitration .................................................. 275
Multi-Master Mode .................................................... 275
Read/Write Bit Information (R/W
Bit) ........................ 251
Slave Mode
Transmission .................................................... 256
Sleep Operation........................................................ 275
Stop Condition Timing .............................................. 274
INDF Register39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 51, 52
Indirect Addressing ............................................................. 56
Instruction Format............................................................. 364
Instruction Set................................................................... 363
ADDLW..................................................................... 367
ADDWF .................................................................... 367
ADDWFC.................................................................. 367
ANDLW..................................................................... 367
ANDWF .................................................................... 367
BRA .......................................................................... 368
CALL......................................................................... 369
CALLW ..................................................................... 369
LSLF......................................................................... 371
LSRF ........................................................................ 371
MOVF ....................................................................... 371
MOVIW..................................................................... 372
MOVLB..................................................................... 372
MOVWI..................................................................... 373
OPTION.................................................................... 373
RESET...................................................................... 373
SUBWFB .................................................................. 375
TRIS ......................................................................... 376
BCF .......................................................................... 368
BSF........................................................................... 368
BTFSC...................................................................... 368
BTFSS...................................................................... 368
CALL......................................................................... 369
CLRF ........................................................................ 369
CLRW ....................................................................... 369
CLRWDT .................................................................. 369
COMF ....................................................................... 369
DECF........................................................................ 369
DECFSZ ................................................................... 370
GOTO....................................................................... 370
INCF ......................................................................... 370
INCFSZ..................................................................... 370
IORLW...................................................................... 370
IORWF...................................................................... 370
MOVLW.................................................................... 372
MOVWF.................................................................... 372
NOP.......................................................................... 373
RETFIE..................................................................... 374
RETLW..................................................................... 374
RETURN................................................................... 374
RLF........................................................................... 374
RRF .......................................................................... 375
SLEEP...................................................................... 375
SUBLW..................................................................... 375
SUBWF..................................................................... 375
SWAPF..................................................................... 376
XORLW .................................................................... 376
XORWF .................................................................... 376
INTCON Register................................................................ 97
Internal Oscillator Block
INTOSC
Specifications ................................... 393, 425, 457
Internal Sampling Switch (R
SS) Impedance ..................... 163
Internet Address ............................................................... 503
Interrupt-On-Change......................................................... 147
Associated Registers................................................ 149
Interrupts ............................................................................ 91
ADC .......................................................................... 158