Datasheet

PIC16F193X/LF193X
DS41364D-page 138 Preliminary  2009 Microchip Technology Inc.
TABLE 12-3: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
REGISTER 12-10: WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1
WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global WPUEN
bit of the OPTION register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in configured as an output.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ADCON0
—
CHS<4:0>
GO/DONE ADON 161
ANSELB
— — ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0 137
APFCON
—CCP3SELT1GSEL P2BSEL SRNQSEL C2OUTSEL SSSEL CCP2SEL 130
CCPxCON
PxM<1:0> DCxB<1:0> CCPxM<3:0> 231
CPSCON0 CPSON
CPSRM
(1)
— — CPSRNG<1:0> CPSOUT T0XCS 323
CPSCON1
— — — — CPSCH<3:> 324
INTCON
GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 99
IOCBP IOCBP7 IOCBP6 IOCBP5 IOCBP4 IOCBP3 IOCBP2 IOCBP1 IOCBP0 150
IOCBN IOCBN7 IOCBN6 IOCBN5 IOCBN4 IOCBN3 IOCBN2 IOCBN1 IOCBN0 150
IOCBF IOCBF7 IOCBF6 IOCBF5 IOCBF4 IOCBF3 IOCBF2 IOCBF1 IOCBF0 150
LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0 137
LCDCON LCDEN
SLPEN WERR — CS<1:0> LMUX<1:0>
329
LCDSE0
SE7 SE6 SE5 SE4 SE3 SE2 SE1 SE0
333
LCDSE1
SE15 SE14 SE13 SE12 SE11 SE10 SE9 SE8
333
OPTION_REG WPUEN
INTEDG TMR0CS TMR0SE PSA PS<2:0> 191
PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 136
T1GCON TMR1GE
T1GPOL T1GTM T1GSPM T1GGO/DONE T1GVAL T1GSS<1:0> 202
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 137
WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 138
Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
Note 1: The Capacitive Sensing Reference Mode (CPSRM) bit is not available for the PIC16F/LF1934/1936 devices.