Datasheet

PIC16F193X/LF193X
DS41364D-page 134 Preliminary  2009 Microchip Technology Inc.
TABLE 12-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
TABLE 12-2: SUMMARY OF CONFIGURATION WORD WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ADCON0
— CHS<4:0>
GO/DONE
ADON
161
ADCON1
ADFM ADCS<2:0> — ADNREF ADPREF<1:0>
162
ANSELA
— — ANSA5 ANSA4 ANSA3 ANSA2 ANSA1 ANSA0
133
APFCON
— CCP3SEL T1GSEL P2BSEL SRNQSEL C2OUTSEL SSSEL CCP2SEL
130
CM1CON0
C1ON C1OUT C1OE C1POL — C1SP C1HYS C1SYNC
180
CM2CON0
C2ON C2OUT C2OE C2POL — C2SP C2HYS C2SYNC
180
CM1CON1
C1NTP C1INTN C1PCH<1:0> — — C1NCH<1:0> 181
CM2CON1
C2NTP C2INTN C2PCH<1:0> — — C2NCH<1:0> 181
CPSCON0 CPSON
CPSRM
(2)
— — CPSRNG<1:0> CPSOUT T0XCS
323
CPSCON1
— — — — CPSCH<3:0>
324
DACCON0 DACEN
DACLPS DACOE --- DACPSS<1:0> --- DACNSS
172
LATA LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0
132
LCDCON LCDEN
SLPEN WERR — CS<1:0> LMUX<1:0>
329
LCDSE0 SE7
SE6 SE5 SE4 SE3 SE2 SE1 SE0
333
LCDSE1 SE15
SE14 SE13 SE12 SE11 SE10 SE9 SE8
333
OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0>
191
PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
132
SRCON0 SRLEN SRCLK<2:0> SRQEN SRNQEN SRPS SRPR
185
SSPxCON1
WCOL SSPxOV SSPxEN CKP SSPxM<3:0>
285
TRISA TRISA7TRISA6TRISA5TRISA4TRISA3TRISA2TRISA1TRISA0
132
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
Note 1: PIC16F193X only.
2: The Capacitive Sensing Reference Mode (CPSRM) bit is not available for the PIC16F/LF1934/1936 devices.
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0
Register
on Page
CONFIG1
13:8
— — FCMEN IESO CLKOUTEN BOREN<1:0> CPD
64
7:0
CP MCLRE PWRTE WDTE<1:0> FOSC<2:0>
CONFIG2
13:8
— — LVP DEBUG — BORV STVREN PLLEN
66
7:0
— — VCAPEN<1:0>
(1)
— — WRT<1:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by PORTA.
Note 1: PIC16F193X only.