Datasheet
2008-2011 Microchip Technology Inc. DS41364E-page 235
PIC16(L)F1934/6/7
REGISTER 23-2: CCPTMRS0: PWM TIMER SELECTION CONTROL REGISTER 0
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6 C4TSEL<1:0>: CCP4 Timer Selection bits
00 = CCP4 is based off Timer2 in PWM mode
01 = CCP4 is based off Timer4 in PWM mode
10 = CCP4 is based off Timer6 in PWM mode
11 =Reserved
bit 5-4 C3TSEL<1:0>: CCP3 Timer Selection bits
00 = CCP3 is based off Timer2 in PWM mode
01 = CCP3 is based off Timer4 in PWM mode
10 = CCP3 is based off Timer6 in PWM mode
11 =Reserved
bit 3-2 C2TSEL<1:0>: CCP2 Timer Selection bits
00 = CCP2 is based off Timer2 in PWM mode
01 = CCP2 is based off Timer4 in PWM mode
10 = CCP2 is based off Timer6 in PWM mode
11 =Reserved
bit 1-0 C1TSEL<1:0>: CCP1 Timer Selection bits
00 = CCP1 is based off Timer2 in PWM mode
01 = CCP1 is based off Timer4 in PWM mode
10 = CCP1 is based off Timer6 in PWM mode
11 =Reserved
REGISTER 23-3: CCPTMRS1: PWM TIMER SELECTION CONTROL REGISTER 1
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-0/0
— — — — — — C5TSEL<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-2 Unimplemented: Read as ‘0’
bit 1-0 C5TSEL<1:0>: CCP5 Timer Selection bits
00 = CCP5 is based off Timer2 in PWM mode
01 = CCP5 is based off Timer4 in PWM mode
10 = CCP5 is based off Timer6 in PWM mode
11 =Reserved