Datasheet

 2008-2011 Microchip Technology Inc. DS41364E-page 145
PIC16(L)F1934/6/7
REGISTER 12-14: PORTD: PORTD REGISTER
(1)
R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 RD<7:0>: PORTD General Purpose I/O Pin bits
1 = Port pin is > V
IH
0 = Port pin is < VIL
Note 1: PORTD is not implemented on PIC16(L)F1936 devices, read as ‘0’.
REGISTER 12-15: TRISD: PORTD TRI-STATE REGISTER
(1)
R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 TRISD<7:0>: PORTD Tri-State Control bits
1 = PORTD pin configured as an input (tri-stated)
0 = PORTD pin configured as an output
Note 1: TRISD is not implemented on PIC16(L)F1936 devices, read as ‘0’.
2: PORTD implemented on PIC16(L)F1934/7 devices only.
REGISTER 12-16: LATD: PORTD DATA LATCH REGISTER
R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 LATD<7:0>: PORTD Output Latch Value bits
(1,2)
Note 1: Writes to PORTD are actually written to corresponding LATD register. Reads from PORTD register is
return of actual I/O pin values.
2: PORTD implemented on PIC16(L)F1934/7 devices only.