Datasheet

 2011-2013 Microchip Technology Inc. DS40001453E-page 373
PIC16(L)F1847
TABLE 30-20: SPI MODE REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Param.
No.
Symbol Characteristic Min. Typ† Max. Units Conditions
SP70* T
SSL2SCH,
T
SSL2SCL
SS
 to SCK or SCK input 2.25 TCY ——ns
SP71* T
SCH SCK input high time (Slave mode) 1 TCY + 20 — — ns
SP72* T
SCL SCK input low time (Slave mode) 1 TCY + 20 — — ns
SP73* TDIV2SCH,
T
DIV2SCL
Setup time of SDI data input to SCK
edge
100 — — ns
SP74* T
SCH2DIL,
T
SCL2DIL
Hold time of SDI data input to SCK
edge
100 — — ns
SP75* TDOR SDO data output rise time — 10 25 ns 3.0V  VDD  5.5V
—2550ns1.8V  V
DD  5.5V
SP76* TDOF SDO data output fall time — 10 25 ns
SP77* T
SSH2DOZSS to SDO output high-impedance 10 — 50 ns
SP78* TSCR SCK output rise time
(Master mode)
—1025ns3.0V  VDD  5.5V
—2550ns1.8V  V
DD  5.5V
SP79* TSCF SCK output fall time (Master mode) — 10 25 ns
SP80* TSCH2DOV,
T
SCL2DOV
SDO data output valid after SCK
edge
— — 50 ns 3.0V  V
DD  5.5V
——145ns1.8V  V
DD  5.5V
SP81* TDOV2SCH,
T
DOV2SCL
SDO data output setup to SCK edge 1 Tcy — — ns
SP82* T
SSL2DOV SDO data output valid after SS
edge
——50ns
SP83* TSCH2SSH,
T
SCL2SSH
SS
after SCK edge 1.5 TCY + 40 — — ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.