Datasheet

2011-2013 Microchip Technology Inc. DS40001453E-page 367
PIC16(L)F1847
TABLE 30-14: ANALOG-TO-DIGITAL CONVERTER (ADC) CHARACTERISTICS
(1,2,3)
TABLE 30-15: ADC CONVERSION REQUIREMENTS
Operating Conditions (unless otherwise stated)
VDD = 3.0V, TA = 25°C
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
AD01 NR Resolution 10 bit
AD02 E
IL Integral Error ±1 ±1.7 LSb VREF = 3.0V
AD03 E
DL Differential Error ±1 LSb No missing codes
V
REF = 3.0V
AD04 E
OFF Offset Error ±1 ±2.5 LSb VREF = 3.0V
AD05 E
GN Gain Error ±1 ±2.0 LSb VREF = 3.0V
AD06 V
REF Reference Voltage
(4)
1.8 VDD VVREF = (VREF+ minus VREF-)
AD07 V
AIN Full-Scale Range VSS —VREF V
AD08 Z
AIN Recommended Impedance of
Analog Voltage Source
—— 10 k Can go higher if external 0.01F capacitor is
present on input pin.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Total Absolute Error includes integral, differential, offset and gain errors.
2: The ADC conversion result never decreases with an increase in the input voltage and has no missing codes.
3: See Section 31.0 “DC and AC Characteristics Graphs and Charts” for operating characterization.
4: ADC VREF is determined by ADPREF<1:0> and ADNREF<1> bits.
Standard Operating Conditions (unless otherwise stated)
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
AD130* TAD ADC Clock Period 1.0 9.0 sFOSC-based
ADC Internal RC Oscillator
Period
1.0 2.5 6.0
s ADCS<2:0> = x11 (ADC FRC mode)
AD131 T
CNV Conversion Time (not
including Acquisition Time)
(1)
—11—TAD Set GO/DONE bit to conversion
complete
AD132* T
ACQ Acquisition Time 5.0 s
AD133* T
HCD Holding Capacitor Disconnect
Time
1/2 TAD
1/2 TAD + 1TCY
FOSC-based
ADCS<2:0> = x11 (ADC FRC mode)
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: The ADRES register may be read on the following TCY cycle.