Datasheet

PIC16(L)F1847
DS40001453E-page 364  2011-2013 Microchip Technology Inc.
TABLE 30-11: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET PARAMETERS
FIGURE 30-9: BROWN-OUT RESET TIMING AND CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
30 T
MCLMCLR Pulse Width (low) 2 — — s
31 TWDTLP Low-Power Watchdog Timer
Time-out Period
12 16 20 ms VDD = 3.3V-5V,
1:16 Prescaler used
32 T
OST Oscillator Start-up Timer Period
(Note 1)
— 1024 — Tosc
33* T
PWRT Power-up Timer Period 58 74 92 ms PWRTE = 0
34* T
IOZ I/O high-impedance from MCLR Low
or Watchdog Timer Reset
——2.0s
35 V
BOR Brown-out Reset Voltage (Note 2) 2.55
1.80
2.70
1.9
2.85
2.05
VBORV= 0
BORV= 1
36* V
HYST Brown-out Reset Hysteresis 20
12
52
38
85
65
mV
mV
BORV= 0, -40°C  TA  +85°C
BORV= 1, -40°C  T
A  +85°C
37* T
BORDC Brown-out Reset DC Response
Time
1335sVDD  VBOR
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: By design, the Oscillator Start-up Timer (OST) counts the first 1024 cycles, independent of frequency.
2: To ensure these voltage tolerances, V
DD and VSS must be capacitively decoupled as close to the device as
possible. 0.1 F values in parallel are recommended.
VBOR
VDD
(Device in Brown-out Reset) (Device not in Brown-out Reset)
33
Reset
(due to BOR)
V
BOR and VHYST
37