Datasheet

PIC16(L)F1847
DS40001453E-page 280  2011-2013 Microchip Technology Inc.
25.7 BAUD RATE GENERATOR
The MSSPx module has a Baud Rate Generator avail-
able for clock generation in both I
2
C and SPI Master
modes. The Baud Rate Generator (BRG) reload value
is placed in the SSPxADD register (Register 25-6).
When a write occurs to SSPxBUF, the Baud Rate
Generator will automatically begin counting down.
Once the given operation is complete, the internal clock
will automatically stop counting and the clock pin will
remain in its last state.
An internal signal “Reload” in Figure 25-40 triggers the
value from SSPxADD to be loaded into the BRG
counter. This occurs twice for each oscillation of the
module clock line. The logic dictating when the reload
signal is asserted depends on the mode the MSSPx is
being operated in.
Table 25-4 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPxADD.
EQUATION 25-1:
FIGURE 25-40: BAUD RATE GENERATOR BLOCK DIAGRAM
TABLE 25-4: MSSPX CLOCK RATE W/BRG
FCLOCK
FOSC
SSPxADD 1+4
-------------------------------------------------=
Note: Values of 0x00, 0x01 and 0x02 are not valid
for SSPxADD when used as a Baud Rate
Generator for I
2
C. This is an implementation
limitation.
F
OSC FCY BRG Value
F
CLOCK
(2 Rollovers of BRG)
32 MHz 8 MHz 13h 400 kHz
(1)
32 MHz 8 MHz 19h 308 kHz
32 MHz 8 MHz 4Fh 100 kHz
16 MHz 4 MHz 09h 400 kHz
(1)
16 MHz 4 MHz 0Ch 308 kHz
16 MHz 4 MHz 27h 100 kHz
4 MHz 1 MHz 09h 100 kHz
Note 1: The I
2
C interface does not conform to the 400 kHz I
2
C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
SSPM<3:0>
BRG Down Counter
SSPxCLK
F
OSC/2
SSPxADD<7:0>
SSPM<3:0>
SCLx
Reload
Control
Reload