Datasheet

 2011-2013 Microchip Technology Inc. DS40001453E-page 121
PIC16(L)F1847
REGISTER 12-5: LATA: PORTA DATA LATCH REGISTER
R/W-x/u R/W-x/u U-0 R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
LATA7 LATA6
— LATA4 LATA3 LATA2 LATA1 LATA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6 LATA<7:6>: RA<7:6> Output Latch Value bits
(1)
bit 5 Unimplemented: Read as ‘0’
bit 4-0 LATA<4:0>: RA<4:0> Output Latch Value bits
(1)
Note 1: Writes to PORTA are actually written to corresponding LATA register. Reads from PORTA register is return
of actual I/O pin values.
REGISTER 12-6: WPUA: WEAK PULL-UP PORTA REGISTER
U-0 U-0 R/W-1/1 U-0 U-0 U-0 U-0 U-0
— — WPUA5 — — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6 Unimplemented: Read as ‘0’
bit 5 WPUA5: Weak Pull-up RA5 Control bit
If
MCLRE in Configuration Words = 0, MCLR is disabled):
1 = Weak Pull-up enabled
(1)
0 = Weak Pull-up disabled
If
MCLRE in Configuration Words = 1, MCLR is enabled):
Weak Pull-up is always enabled.
bit 4-0 Unimplemented: Read as ‘0’
Note 1: Global WPUEN
bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in configured as an output.