Datasheet

PIC16(L)F1847
DS40001453D-page 362 Preliminary  2011-2013 Microchip Technology Inc.
FIGURE 30-8: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 30-9: BROWN-OUT RESET TIMING AND CHARACTERISTICS
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Start-Up Time
Internal Reset
(1)
Watchdog Timer
33
32
30
31
34
I/O pins
34
Note 1: Asserted low.
Reset
(1)
VBOR
VDD
(Device in Brown-out Reset) (Device not in Brown-out Reset)
33
(1)
Note 1: 64 ms delay only if PWRTE bit in the Configuration Word 1 is programmed to ‘0’.
2 ms delay if PWRTE
= 0.
Reset
(due to BOR)
V
BOR and VHYST
37