Datasheet
PIC16(L)F1847
DS40001453D-page 360 Preliminary 2011-2013 Microchip Technology Inc.
TABLE 30-2: OSCILLATOR PARAMETERS
TABLE 30-3: PLL CLOCK TIMING SPECIFICATIONS (V
DD = 2.7V TO 5.5V)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param.
No.
Sym. Characteristic
Freq.
Tolerance
Min. Typ† Max. Units Conditions
OS08 HFOSC Internal Calibrated HFINTOSC
Frequency
(Note 1)
2% — 16.0 — MHz 0°C TA +60°C, VDD 2.5V
3% — 16.0 — MHz 60°C TA +85°C, VDD 2.5V
5% — 16.0 — MHz -40°C TA +125°C
OS08A MF
OSC Internal Calibrated MFINTOSC
Frequency
(Note 1)
2% — 500 — MHz 0°C TA +60°C, VDD 2.5V
3% — 500 — kHz 60°C TA +85°C, VDD 2.5V
5% — 500 — kHz -40°C TA +125°C
OS09 LF
OSC Internal LFINTOSC Frequency — — 31 — kHz (Note 2)
OS10* TIOSC ST HFINTOSC
Wake-up from Sleep Start-up Time
MFINTOSC
Wake-up from Sleep Start-up Time
—
—
—
—
5
20
8
30
s
s
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1
F and 0.01 F values in parallel are recommended.
2: See Figure 31-60 and Figure 31-61: LFINTOSC Frequency Characteristics over VDD and Temperature.
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
F10 F
OSC Oscillator Frequency Range (Note 1) 4—8MHz
F11 FSYS On-Chip VCO System Frequency 16 — 32 MHz
F12 TRC PLL Start-up Time (Lock Time) — — 2 ms
F13* CLK CLKOUT Stability (Jitter) -0.25% — +0.25% %
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: The min. and max. frequency specifications are the oscillator nominal frequencies. Oscillators may have
frequency tolerances of up to
5%.