Datasheet

 2011-2013 Microchip Technology Inc. Preliminary DS40001453D-page 225
PIC16(L)F1847
TABLE 24-10: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON0 RXDTSEL SDO1SEL SS1SEL P2BSEL CCP2SEL P1DSEL P1CSEL CCP1SEL
118
CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 226
CCP1AS CCP1ASE CCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 228
CCPTMRS C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0> 227
INTCON GIE PEIE
TMR0IE INTE IOCE TMR0IF INTF IOCF 88
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 89
PIE2
OSFIE C2IE C1IE EEIE BCL1IE — — CCP2IE 90
PIE3
— — CCP4IE CCP3IE TMR6IE — TMR4IE — 91
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 93
PIR2
OSFIF C2IF C1IF EEIF BCL1IF — —CCP2IF94
PIR3
— — CCP4IF CCP3IF TMR6IF — TMR4IF — 95
PR2
Timer2 Period Register
189*
PR4 Timer4 Module Period Register
189*
PR6 Timer6 Module Period Register
189*
PSTR1CON
— — — STR1SYNC STR1D STR1C STR1B STR1A 230
PWM1CON P1RSEN P1DC<6:0> 229
T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0>
191
T4CON
— T4OUTPS<3:0> TMR4ON T4CKPS<1:0>
191
T6CON
— T6OUTPS<3:0> TMR6ON T6CKPS<1:0>
191
TMR2 Holding Register for the 8-bit TMR2 Time Base
189*
TMR4 Holding Register for the 8-bit TMR4 Time Base
189*
TMR6 Holding Register for the 8-bit TMR6 Time Base
189*
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 120
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 126
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.