Datasheet

PIC16(L)F1825/1829
DS41440C-page 36  2010-2012 Microchip Technology Inc.
Bank 5
280h
(1)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
281h
(1)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
282h
(1)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
283h
(1)
STATUS — — —TOPD ZDCC---1 1000 ---q quuu
284h
(1)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
285h
(1)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
286h
(1)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
287h
(1)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
288h
(1)
BSR — — — BSR<4:0> ---0 0000 ---0 0000
289h
(1)
WREG Working Register 0000 0000 uuuu uuuu
28Ah
(1)
PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
28Bh
(1)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 0000 0000 0000
28Ch
— Unimplemented — —
28Dh
— Unimplemented — —
28Eh
— Unimplemented — —
28Fh
— Unimplemented — —
290h
— Unimplemented — —
291h CCPR1L Capture/Compare/PWM Register 1 (LSB) xxxx xxxx uuuu uuuu
292h CCPR1H Capture/Compare/PWM Register 1 (MSB) xxxx xxxx uuuu uuuu
293h CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 0000 0000 0000 0000
294h PWM1CON P1RSEN P1DC<6:0> 0000 0000 0000 0000
295h CCP1AS CCP1ASE CCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 0000 0000 0000 0000
296h PSTR1CON
— — — STR1SYNC STR1D STR1C STR1B STR1A ---0 0001 ---0 0001
297h
— Unimplemented — —
298h CCPR2L Capture/Compare/PWM Register 2 (LSB) xxxx xxxx uuuu uuuu
299h CCPR2H Capture/Compare/PWM Register 2 (MSB) xxxx xxxx uuuu uuuu
29Ah CCP2CON P2M1 P2M0 DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 0000 0000 0000 0000
29Bh PWM2CON P2RSEN P2DC6 P2DC5 P2DC4 P2DC3 P2DC2 P2DC1 P2DC0 0000 0000 0000 0000
29Ch CCP2AS CCP2ASE CCP2AS2 CCP2AS1 CCP2AS0 PSS2AC1 PSS2AC0 PSS2BD1 PSS2BD0 0000 0000 0000 0000
29Dh PSTR2CON
— — — STR2SYNC STR2D STR2C STR2B STR2A ---0 0001 ---0 0001
29Eh CCPTMRS C4TSEL1 C4TSEL0 C3TSEL1 C3TSEL0 C2TSEL1 C2TSEL0 C1TSEL1 C1TSEL0 0000 0000 0000 0000
29Fh
— Unimplemented — —
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC16(L)F1829 only.
3: PIC16(L)F1825 only.
4: Unimplemented, read as ‘1’.